The present invention relates to a data processor or a data processing system and, more particularly, to a technique of generating a branch address. The invention relates to, for example, a technique effectively applied to a data processor capable of designating a branch address by a 64-bit absolute address in a logical address space specified by a 64-bit address.
A CPU (Central Processing Unit) in which logical address space is specified by 64 bits and the number of bits of a register is 64 bits is called a 64-bit CPU. For example, in the case of using a virtual storage in the 64-bit CPU, it is sufficient to designate a branch destination of a branch instruction in the range of the size of an instruction area of a process. For example, in the case where the instruction area of a single process is 4 GB (gigabytes) at the maximum, also in the case of designating a branch destination by an immediate address, 32 bits are sufficient for an address field. However, in a use which does not employ a virtual storage or in an operation of turning off a virtual storage, in a case such that a process instruction area is disposed exceeding 4 GB from the head of the memory space, even when the instruction area of a single process is smaller than 4 GB, in the case of designating a branch address by an immediate address, 64 bits are necessary for an address field and 64 bits or more are necessary for an instruction sequence. There is a technique of using a resister value to designate a 64-bit branch address while suppressing the number of bits necessary for an instruction sequence to a value less than 64 bits. Japanese Unexamined Patent Publication No. 2002-229778 discloses a technique of generating a branch address by adding a value obtained by code-extending displacement to the value of a program counter. Japanese Unexamined Patent Publication No. 2002-14808 discloses a technique of setting a value stored in a register as an upper-order address, setting a value stored in another register as a lower-order address, and combining the addresses to thereby generate a branch address.